Compute in Plan A

This supplement explains our estimates and forecasts on compute-related numbers. It is divided into two major parts, the first pre-2029 and the second post-2029 (where it becomes conditional on Plan A). In the pre-2029 section, the main goal is to forecast the total amount of compute in the world year by year, and to break this compute down into informative categories, including AI-relevant and non-AI-relevant compute, single-devices vs. clusters, regional ownership, and datacenter sizes (for AI-relevant clusters). Post-2029 it justifies how much compute we think could be produced with AI acceleration of hardware R&D and production, as well as our forecasts for the concentration of compute in companies, the allocation of frontier AI compute between uses and our guesses about how AI copies-speed numbers will look in the Plan A scenario.

Summary in figures

Compute Definitions

Measuring compute: Raw vs effective H100e

The primary metric used in this supplement is H100-equivalents (H100e) multiples of one Nvidia H100 GPU measured in Total Processing Performance (TPP).

But compute isn't the only relevant hardware performance metric. The usefulness of compute for AI workloads also depends on many other factors, including memory bandwidth, memory capacity (stores and feeds data to the compute), and interconnect (to send data in between chips). Compute (H100e) is the headline metric we focus on but we also want to account for overall AI usefulness, so we also look at four other hardware resources, and combine them into an overall effective H100e metric:

Effective H100e adjusts raw H100e (which counts compute alone) by a single usefulness factor $U$.

$U$ is built from the four other resources in the table above. It adjusts for a chip's ability to actually be served by memory and communicate with other chips for representative AI workloads of its era, all relative to a 2024 100K H100 SXM cluster, which scores exactly $U=1$.

Hardware that is memory-rich and well-networked for its FLOP/s can score above 1 (non-AI CPU servers, which carry lots of memory and networking around relatively little compute, score ~1.4), and e.g., compute with poor networking abilities (like gaming GPUs and phones) scores below one.

The usefulness factor is explained in full in the appendix.

Four categories of compute

The supplement attempts to model all the compute in the world and then partitions it in two independent ways giving four categories.

Partition 1: AI-relevant vs non-AI-relevant. A chip is considered AI-relevant if it clears all four floors of our AI-relevant cutoff thresholds set just below an A100 GPU.

Partition 2: cluster vs single-device.

Cluster = is actively used in a multi-device setting with at least 2 devices connected at least at 5 GB/s bidirectional speed.

Single-device = actively used as a single device (e.g., a phone, a PC, a gaming card) or otherwise does not meet the cluster definition.

These definitions give us four categories of compute.

Part 1. Pre-deal compute (pre-2029)

1.1 AI-relevant compute

In this section we forecast AI-relevant compute production with a demand-side method:

capex spent ($) $\times$ cost-efficiency (H100e / $) = compute added (H100e)

The AI capital expenditure trend has been ~1.72x/yr through Q3 2023 to Q4 2025, while cost-efficiency (H100e per dollar) has been improving around 1.4x/yr.

AI capex (~1.72×/yr)Cost-efficiency (~1.4×/yr)

Source: Epoch AI — hyperscaler capex

Extrapolating these trends naively would lead to the following compute forecast:

The rest of this section will attempt to improve the forecast from this naive baseline.

Improving the capex forecast

Through 2025 the buildout was paid for almost entirely out of big-tech's operating cashflow. However, if this trend continues capital expenditures are on track to overtake operating cash flow of hyperscalers around Q3 2026.

To make a forecast that takes this into account, we split capex projections into three sources: existing-trend hyperscaler cash flow, AI cash flow (additional compute spend from AI company revenues, approximated as 80% of frontier AI company revenue forecasts), and debt & equity raises (which we are already starting to see grow in 2025/2026).

Our projections are as follows:

• Existing-trend hyperscaler cash flow to continue growing at ~20%/yr (Epoch's ~$478B → $603B, with frontier AI company revenue stripped out) and deploy a rising share of it into the buildout, an invested fraction climbing ~75 → 85% as capex consumes more of cash flow.

• AI cash flow to follow a total ARR (across frontier AI companies) of $30B (start-2026) → $180B → $500B → $1T (start-2029), with 80% of the recognized revenue counted as additional compute spend.

• Debt & equity raises are hand forecasted (low effort) as a declining multiple of AI revenue: 3x (2025), 2.8x (2026), 1.8x (2027), 1.6x (2028). This is highly uncertain: on the one hand AI revenue growth motivates leverage, but as the total debt raise grows the interest rate will likely get higher. Note also that leverage at these levels implicitly conditions on the scenario's fast AI progress continuing (lenders keep believing in the revenue growth); like the revenue path itself, it is an input consistent with this scenario rather than an unconditional forecast.

With 2024-25 pinned to Epoch's Broad CapEx ($260B / $448B), this carries total AI capex to ~$2.4T in 2028, with debt reaching ~$900B (38% of the 2028 buildout). (We use hyperscaler Broad CapEx as the proxy for total AI capex: hyperscalers are ~60-90% of global AI spend, and ~60-90% of their capex is AI, and we assume the two gaps roughly cancel.) This is 7% higher than the naive baseline's (extrapolating the ~1.72x/yr trend) 2028 capex of $2.28T! This is because our bullish AI revenue forecast (and the debt raises we think its fast growth will motivate) actually pulls the trend slightly upwards.

Improving the cost efficiency forecast (supply-side)

The capex forecast is a demand-side forecast, while for cost-efficiency it makes sense to look at supply side. In particular, this section will focus on lithography (primarily EUV) capacity as the primary expected bottleneck on how many H100e can be produced.

EUV is needed for leading-edge logic, and the leading HBM DRAM nodes now use it too (DRAM was manufactured entirely without EUV until recently, e.g., Micron only adopted it in 2025, so this is a cost-optimality choice rather than a strict requirement; avoiding EUV just shifts the same demand onto the shared DUV pool). EUV is extremely hard to scale on short notice given the complexity of the machines and extensive supply chain dependencies, so we expect it to be the most important and informative bottleneck. Because of the time-inelasticity (how hard it is to quickly scale production in response to price signal), the EUV fleet is also relatively easy to forecast.

AI's share of the EUV fleet grows from ~7% in 2024 toward ~64% by 2028 (and ~77% by 2029, near saturation). We expect this to translate to higher prices as it requires outbidding other uses of the fleet (e.g., phones, PCs, etc.). To model this, we implement a hand-chosen cost surcharge curve that depends on the fleet usage (highly uncertain ad-hoc choice).

Applying this surcharge to the naive price-performance trend gives an updated compute cost-efficiency trend that averages ~1.25x/yr from 2025-2028 (and slows to just ~1.1x/yr by 2028 as the surcharge bites) instead of the historical ~1.4x/yr.

Multiplying this cost-efficiency baseline (incl. the scarcity surcharge) by the capex topline gives the annual H100e added (~155M in 2028), and an installed stock of ~280M by end-2028. We also adjust very slightly downwards for chip survival rates. China's domestically manufactured compute (§1.3) does not draw on this EUV supply chain, so we forecast it separately and add it onto this total, bringing the world AI stock to ~287M.

1.2 All compute

§1.1 forecast AI-relevant compute. Now we extend to all compute in the world. We split all compute into six device categories:

Our method works by looking at two quantities. The device side is the compute we get from counting the units shipped and the average compute carried on each device. The lithography side is the compute the world can make, from counting the wafers the fabs can produce and the compute each wafer turns into.

device side $\to$ H100e = units $\times$ H100e per unit

lithography side $\to$ H100e = wafers $\times$ H100e per wafer

The compute per wafer is the quantity we are least sure of, so it is what we attempt to pin down from history (where we can get good estimates of all the other values).

1.2.1 Calibration (2015 to 2024)

Across 2015 to 2024 we look at device demand (units shipped and compute per unit) and lithography supply (wafers shipped), and use this to back out an estimate of compute per wafer that we can then use to forecast future compute by category based on wafer allocation and wafer supply forecasts (which are easier to do than device demand forecasts, because the supply side can be forecasted with the relatively predictable lithography ceiling).

The lithography utilization by category is shown below. We treat every category as a package with its logic and associated memory (HBM, DRAM, NAND).

The resulting H100e added each year by category is shown below in both raw and effective H100e:

1.2.2 Forecast (2025 to 2028)

We take AI's compute forecast from §1.1 and ration the leftover lithography capacity to the other compute categories. AI first claims its lithography usage and then each non-AI category keeps its frozen-2024 share of the wafers that remain. That gives the projection:

The rest of this section is the supply-side justification behind that table, i.e., what share of the lithography ceiling each category uses.

EUV utilization reaches ~100% by 2028 in our naive model, up from only 52% in 2024, as we expect it to become the binding constraint by then. That figure already separately accounts for uptime and realized throughput, both held at 2024 proportions. We don't expect utilization to literally hit 100%, but we're comfortable with the approximation: uptime and realized throughput (as a share of peak theoretical throughput) should improve a bit by 2028, roughly offsetting the gap.

1.2.3 Results

Accumulating production net of retirement gives the installed stock by category. Rescaling raw H100e to effective H100e (raw x $U$, the resource-adjusted AI workload usefulness model derived in the appendix).

Cluster vs. single-device split. We also categorize compute into clusters and single-devices. Non-AI servers are treated as non-AI relevant clusters; phones, PCs, gaming GPUs and embedded chips are non-AI single-device; and AI relevant compute is almost entirely in accelerators run in datacenters (AI-relevant clusters), but there is a small rising amount of AI-relevant single-device chips that is negligible today and grows later as datacenter-class GPUs reach desktop form factors (e.g., NVIDIA's DGX Station).

1.3 Regional ownership

This section forecasts world compute ownership by region, for the AI-relevant compute from §1.1. We split ownership three ways: US, China, and the Rest of the World. We think it is most informative to focus on a separate Chinese compute forecast, because China is cut off from the main global supply chain by export controls, making it the hardest region to pin down with a crude percent-of-spending estimate.

What follows is therefore an independent Chinese compute forecast, broken down by the different sources of compute reaching China. We then make a crude estimate of the US versus Rest-of-World split of the global total. China's domestic manufacturing is treated as separate from the world compute total forecast in §1.1, because it does not come from the same (EUV-based) supply chain, so the §1.1 totals add it back on.

1.3.1 Chinese compute forecast

We categorize China's AI compute into four sources: Three come from the global supply chain (already in the §1.1 world total): legal imports (export-compliant chips: e.g., H20s historically, H200 under the current licensing policy), smuggled chips, and loopholes (chip dies smuggled in before packaging, or offshore datacenters Chinese firms own or lease from abroad). The fourth is domestically manufactured chips (SMIC 7nm logic / CXMT HBM / Ascend). China's compute grows ~9x over 2026-2029, but its world share still falls toward ~9% because the global buildout outpaces it.

The four channels combined (M raw H100e):

1.3.2 Results

Combining the world total (§1.1), the China forecast (§1.3.1), and an 85/15 US/RoW split of the remainder gives ownership by region: the US holds the great majority throughout, China ~15% → ~9%.

1.4 Datacenter sizes

In this section we forecast how the AI compute from §1.1 will be distributed across datacenter sizes, from gigawatt-scale training campuses down to the long tail of small regional sites. The method is relatively naive (and uncertain). We take the total AI compute forecast (from §1.1), and spread it across a total datacenter count, fit a curve of datacenter sizes with three concentration anchors, and then split the result across the US, China, and the Rest of the World ownerships (from §1.3).

Part 2. Post-deal compute (post-2029)

In this section we forecast what happens after Plan A is implemented, as well as the 1-year default counterfactual without Plan A.

2.1 The no-deal counterfactual

To predict one more year of the default (no-deal) path, we extend the §1.1 method (and §1.3 for China's domestic additions) to the installed stock at the end of 2029. Under Plan A we expect the temporary R&D pause and general uncertainty during the deal's implementation to make capital spending temporarily lower. We approximate this by having the debt-financed slice of the buildout collapse to zero under Plan A, while cash capex stays on trend. With the fast implementation of inference-only verification and increased inference-compute allocation, we expect the AI revenue forecast to stay on par with the default counterfactual.

Overall, we think a good implementation of the deal can provide confidence to companies that R&D will be allowed to resume, and that given the level of realized capabilities and continued improvements once R&D resumes (which will be at a slowed down but still fast pace), we expect AI investment to still be extremely economically attractive. We expect this to hold despite increased transparency, because without algorithmic moats the economic value will accrue to the owners of compute (who can therefore still be the ones to train the best models first and serve them to the widest user base).

2.2 AI-relevant compute after the deal

Further into Plan A, we have increased uncertainty over compute growth, especially as AI and robots become capable of automating hardware R&D and production, and drastically increasing the previously human-constrained workforce. Given the uncertainty, we think it is reasonable to use a relatively simple model (Jones and Wright's-law learning) that takes the §1.1 compute path as its starting point and runs it to 2040. Given the hardware explosion we expect by default with unconstrained AI and robot deployment on hardware R&D and production, and the fact that this would be destabilizing (among other things, increasing the ease of defecting on the deal and verification burden within the deal) Plan A features a cap-and-trade regime to slow down the hardware explosion to controllable (but still drastically increased) hardware levels.

Why we expect hardware to grow fast. We can think of two separate forces lowering the cost per unit of compute:

• Design improvements (modelled with Jones). Design improvements can lead to more compute per fixed unit of AI chip production, with better chip layouts, memory designs, transistor density, packaging etc. This is R&D, so we can model it with the labor spent on it, but with diminishing returns as the easy ideas get used up (Jones 1995, calibrated by Bloom et al. 2020) and with diminishing returns to more parallel labor at a given time. Think of this as the historical improvements in 'compute per wafer' (including node shrinks, which we bucket under design R&D since they come from chip and equipment research rather than from production scale). Roughly 2 million people work in semiconductors today; by the early 2030s our forecast is that combined human, AI, and robot effort on chip and equipment R&D is on the order of 100x that. Under our model's parameters this only speeds up the 'Moore's law' progress by around 1.1x.

• Production scaling (Wright). Pure manufacturing scale of units of compute can lead to 'learning by doing' efficiency improvements, e.g., with yield, throughput, uptime effects, and economies of scale. Think of this as the improvements in 'wafers per dollar' historically. We model unit cost falling about 15% per doubling of cumulative production (similar to long-run semiconductor and solar rate). We don't know if AI and robots automating fab construction and operation will speed up this trend, but at least think it's a reasonable baseline that these gains from scale will continue separately to design improvements.

We treat the cost per unit of compute ($ / H100e) as the product of the two factors (compute / unit produced) and (units produced / $), where historically the unit has been 'wafers' but may change with future paradigms. Each factor is normalized to 1 in 2025 and falling thereafter. We take the §1.1 endpoint as the starting point and run these two models forwards to 2040.

The hardware explosion has two throttles in Plan A. Without them there is too much progress for the deal's stability (ease of defection and verification burden). There is a feedback loop where more compute leads to more hardware R&D and production, leading to more compute and cheaper hardware. Plan A has two constraints that act on different parts of that loop: capping production levels (cap-and-trade policy from 2032 onwards) and limiting R&D deployment (to avoid compute becoming too easy and cheap to manufacture despite the quantity caps).

We can also express Plan A's buildout in dollars, as a check on the investment it implies. Each year's implied investment is the compute added that year times an all-in cost per H100e, which is the production cost from the model above times a markup covering everything else a dollar of AI capex buys (chip-maker margin, datacenters, power, networking). We calibrate the markup so that 2025 to 2028 reproduce Part 1's capex forecast exactly (~$2.4T in 2028) and 2029 the §2.1 deal year: this gives roughly 7x to 8x. Our best guess is that the markup then declines to ~1.2x by 2040, since robot-built fabs and datacenters should sell hardware near production cost, and the power and datacenter share of each H100e shrinks with the efficiency gains below.

We are very uncertain about the uncapped paths, but we think the unconstrained default is likely to be orders of magnitude higher than our capped path. The effective labor available for hardware R&D and chip production scales enormously once AI and robots are capable of that work. We think the stacked Jones and Wright's-law learning-curve dynamics are a reasonable naive approximation of what this might look like.

Historically, chip design improvements have been closely tied to power-efficiency improvements, so we model compute power efficiency on the same Jones design trend as the cost model above, using the same parameters (25%/yr base rate, stepping-on-toes $\lambda = 0.05$) at Plan A's constrained R&D pace, which leads to the following trajectory (notably not breaking past the CMOS transistor theoretical limit that Epoch estimates).

2.3 Company concentration

In this section we show our projections for how compute is distributed among companies over time. We track AI company end-users (the company that actually uses the compute) as opposed to owners (who may use or rent their compute to others). Early on most compute is owned by hyperscalers in a concentrated way (Google owns ~25% of compute) but the AI company end-users are less concentrated, with the largest using around 10% of global compute in 2026 (GDM and OpenAI are similar).

The share used by AI companies has been growing over time, and we project this trend forwards until Plan A is implemented. After 2030 the Plan A transparency regime lowers barriers to entry: investment in AI grows and spreads more evenly, and compute becomes distributed across more companies. By 2040 the largest holds only about 5% of world compute and there are around 20 frontier companies (defined as anyone within 4x of the largest).

2.4 Compute allocation

In this section we forecast allocation of frontier AI compute in Plan A. In 2025 OpenAI spent around half of its compute on inference and more like one third on inference in 2024 and the rest on training and experiments (of which only around 10% on final frontier training runs). We project this current split forwards naively until the 2029 deal, and then forecast each share conditional on Plan A.

2.5 AI copies and speed

In this section we forecast how many copies of the frontier model can be run at once and at what token/second speed. These are both imperfect metrics, because it may be difficult to know how to count a 'copy' under different scaffolds / architectures in the future, but we assume each parallel instance of the model weights being served, so copies = replicas x batch. Speed is also imperfect, because we probably care more about the speed of task completion, but we just focus on decode tokens per second, even though the speed comparison in tokens might break down with future paradigm changes, e.g., neuralese instead of chain of thought.

Up front: these forecasts are concrete best guesses, and we think the honest uncertainty is multiple orders of magnitude. Both the AI paradigm (architectures, sparsity, agent scaffolds, whether 'copies' is even the right frame) and the hardware paradigm (the memory and bandwidth tradeoffs of chips, how much silicon gets specialized for inference) could change several times before 2040. The method itself is simple, and we prefer to state it plainly: we guess the frontier model's size, we guess what share of the world's compute runs inference, and then we get copies by dividing the inference fleet's total memory by the bytes each copy takes, and we get speed from how quickly memory bandwidth can read the bytes each token needs. The rest of this section explains how we make each of these guesses.

Model size. We combine the global compute growth from the previous sections with the leading company's concentration (§2.3) and training allocation (§2.4) to get frontier training compute over time (roughly 32x today's by 2029 and 160,000x by 2040). We then map these compute numbers as well as a sparsity forecast to model size (total parameters) with a simple model:

Where $P$ is total parameters ($P_{2026} \approx 10$T, today's level), $C$ is frontier training compute, and $\sigma$ is sparsity. The compute exponent $\alpha$ is the sensitivity of model-size scale up to compute scale up. Simple Chinchilla-optimality implies ~0.5, but we have wide uncertainty; there are reasons it might increase, e.g., due to data availability (fitting our formula to Nesov's own compute and sparsity numbers gives $\alpha \approx 0.8$), or for example, intentional undertraining due to e.g., making it harder to steal the weights. There are also reasons it might decrease, e.g., more overtraining for serving (Sardana and Frankle), reinforcement learning, and other unknown unknowns about paradigm changes. We just assume $\alpha = 0.5$ and draw $\alpha \in [0.2, 0.8]$ as a range on the figure to show what we think is a plausible range. The sparsity exponent $\beta = 0.74$ is tentatively better pinned (though the sparsity MoE paradigm might change).

We think it's valuable to include the sparsity assumption because it might affect the speed and copies significantly.